1. Field of the Invention
The present invention relates generally to the filed of substrate processing for semiconductor manufacturing and more specifically to an improved method for controlling dopant concentration during borophosphosilicate glass (BPSG) film deposition on a semiconductor wafer to reduce consumption of nitride layer on the semiconductor wafer.
2. Description of Related Art
Silicon oxide is widely used as an insulating layer in the manufacture of semiconductor devices. For a number of years, boron and phosphorous doped silicate films, such as borophosphosilicate glass (BPSG) films, deposited with liquid sources such as tetraethylorthosilicate (TEOS), have gained preference among silicon oxide films for their superior gap filling capability upon glass reflow.
BPSG films are generally deposited on a silicon wafer or substrate by thermal or plasma enhanced chemical vapor deposition (CVD) processes from a reaction of an oxygen-containing source such as ozone (O3), with a silicon-containing source, such as TEOS, conducted in atmospherically-controlled heated reactor or chamber. For BPSG films, dopants such as boron in the form of triethylborate (TEB) and phosphorous in the form of triethylphosphate (TEPO) are also introduced in the reaction chamber during ozone/TEOS reaction. In general, reaction rates in thermal and plasma CVD processes may be controlled by controlling one or more of the following: temperature, pressure, reactant gas flow rate and radio-frequency (RF) power.
The reactants, e.g. TEOS, TEB, TEPO, are typically converted from a solid or liquid state into a gaseous or vapor state by a precision liquid injection (PLI) system to achieve a high degree of uniformity by vapor deposition. The precursor vapor, once generated, is directed into the reaction chamber, to form a deposited layer on the substrate. Current generation precision liquid injection systems provide imprecise control of dopants TEB and TEPO into the reaction chamber. Furthermore, these dopants are generally introduced into the deposition chamber at the same time using current generation PLI systems.
Typically, a BPSG film is deposited on a semiconductor device/substrate over of a layer/film of silicon nitride (Si3N4) which functions as an etch stop or spacer during the manufacture of the integrated circuit. Following deposition, the BPSG film generally undergoes a reflow step with wet (e.g. steam) annealing at a temperature of about 800-900° C. in order to planarize the BPSG layers and to fill in any voids that may be present in the BPSG layer/film. During the steam anneal phase, boron and phosphorous dopants present in the BPSG layer start migrating within the layer, generally resulting in a high concentration of free phosphorous atoms near the nitride layer. Studies have shown that the free phosphorous in the initial BPSG film in reaction with water vapors from the steam anneal process forms phosphoric acid (H3PO4) which is a well known etching agent for stripping nitride. Inconsistent dopant concentration, particularly at interfaces with other materials, results in inconsistent processing and defective device formations.
Thus, there is a need for a method for selectively controlling boron and phosphorous dopant concentration deposition over a substrate, and more particularly a method for controlling phosphorous dopant deposition profile and/or distance of the phosphorous dopant from the nitride surface in order to reduce the silicon nitride layer consumption.